1. High Voltage Arcing Protection: When testing high voltages on a wafer, discharges (arcing) may occur between probes and also between the device under test (DUT) and neighboring devices or between other test pads. In addition, at voltages higher than 1000 V,wafer tester arcing discharges may occur between the wafer carrier pad and the surrounding probe pads.

2. Low contact resistance between the probe and the device: For accurate high current measurements, the contact resistance between the probe and the device needs to be as low as possible. This ensures that the complete performance of the device is measured on the wafer and is identical to the performance of the packaged device. This helps to reduce the cost of end-application power modules.

3. Uniform Contact and Thermal Resistance between Wafer and Carrier: In order to obtain accurate data for each device on the wafer,wafer probe testing there needs to be uniform physical contact between the backside of the wafer and the top surface of the chuck. First, this spreads out thermal errors by ensuring that all heat generated from the devices is directed away from each device, regardless of the location of the devices on the wafer. Second, for vertical devices where the chuck acts as one of the electrical contacts (e.g., IGBTs), this enables ultra-low contact resistance, which is a key requirement for overcoming resistance errors in RDS(on) non-Kelvin tests. Only when these two challenges are addressed can the maximum performance of each device be seen in the test data.

4. Accurate Device Models for Circuit Designers: Product characterization engineers are challenged to simultaneously meet the ability to measure high voltages/currents and accurate low leakage performance to create complete device models.vibration isolation table This will help circuit designers optimize their power IC designs for maximum business value. Balancing high voltage/current switching with device power consumption when not in operation (disconnected state) is the focus of this work.